Advanced model order reduction techniques in VLSI design (Record no. 14771)
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000 -LEADER | |
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fixed length control field | 00666nam a2200205Ia 4500 |
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
fixed length control field | 160330s9999||||xx |||||||||||||| ||und|| |
020 ## - ISBN | |
International Standard Book Number | 9780521865814 |
040 ## - CATALOGING SOURCE | |
Original cataloging agency | Central Library-NITS |
041 ## - Language | |
Language | English |
082 ## - DDC NUMBER | |
Classification number | 621.395 |
Book Number | TAN |
100 ## - MAIN ENTRY--PERSONAL NAME | |
Personal name | Tan, Sheldon X.-D. |
245 ## - TITLE STATEMENT | |
Title | Advanced model order reduction techniques in VLSI design |
Statement of Resposibility | by Sheldon X.-D. Tan & Lei He |
260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
Place of publication, distribution, etc | New York |
Name of publisher, distributor, etc | Cambridge University Press |
Date of publication, distribution, etc | 2007 |
300 ## - PHYSICAL DESCRIPTION | |
Pages | xviii, 240p.:ill |
504 ## - BIBLIOGRAPHY, ETC. NOTE | |
Bibliography, etc | includes bibliographical references and index |
650 ## - Subject | |
Subject | Electronics and Communication Engineering |
700 ## - Added Entry Personal Name | |
Added Entry Personal Name | He, Lei |
942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
Koha item type | Books |
521 ## - | |
-- | P T Books |
Withdrawn status | Lost status | Damaged status | Not for loan | Location (home branch) | Sublocation or collection (holding branch) | Date acquired | Koha issues (times borrowed) | Koha full call number | Barcode (Accession No.) | Koha date last seen | Price effective from | Koha item type |
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National Institute of Technology, Silchar | National Institute of Technology, Silchar | 03/30/2016 | 621.395 TAN | 90859 | 03/30/2016 | 03/30/2016 | Books |