Amazon cover image
Image from Amazon.com

System-on-chip test architectures : Nanometer design for testability edited by Laung-Terng Wang, Charles E. Stroud and Nur A. Touba

Contributor(s): Material type: TextTextLanguage: English Publication details: Amsterdam Elsevier 2008Description: xxxvi, 856pISBN:
  • 978-0-12-373973-5
Subject(s): DDC classification:
  • 621.395 SYS
Star ratings
    Average rating: 0.0 (0 votes)
Holdings
Item type Current library Call number Status Date due Barcode
Books Books National Institute of Technology, Silchar 621.395 SYS (Browse shelf(Opens below)) Available 66332

Includes bibliographical references and index

Hi-tech Book

There are no comments on this title.

to post a comment.
AVIOR TECHNOLOGIES PVT. LTD.
Phone no. 91-8017616701, Fax no. 91-XX-XXXX XXXX, sales@aviortechnologies.co.in


Visitor Counter

Powered by Koha