CMOS SRAM circuit design and parametric test in nano-scaled technologies: process-aware SRAM design and test By Andrei Pavlov and Manoj Sachdev

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Material type: Text

TextLanguage: English Publication details: New Delhi Springer 2011Description: xvi, 193 p. ; 23 cmISBN:

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Holdings
Item type	Current library	Call number	Status	Barcode
Books	National Institute of Technology, Silchar	621.38152PAV (Browse shelf(Opens below))	Available	82981
Books	National Institute of Technology, Silchar	621.38152PAV (Browse shelf(Opens below))	Available	82982
Books	National Institute of Technology, Silchar	621.38152PAV (Browse shelf(Opens below))	Available	82983
Books	National Institute of Technology, Silchar	621.38152PAV (Browse shelf(Opens below))	Available	82984
Books	National Institute of Technology, Silchar	621.38152PAV (Browse shelf(Opens below))	Available	83035

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Previous	621.381'32 High-Frequency and microwave circuit design.	621.38152/MIS Semiconductor device physics and design	621.38152PAV CMOS SRAM circuit design and parametric test in nano-scaled technologies: process-aware SRAM design and test	621.38152PAV CMOS SRAM circuit design and parametric test in nano-scaled technologies: process-aware SRAM design and test	621.38152PAV CMOS SRAM circuit design and parametric test in nano-scaled technologies: process-aware SRAM design and test	621.38152PAV CMOS SRAM circuit design and parametric test in nano-scaled technologies: process-aware SRAM design and test	621.38152PAV CMOS SRAM circuit design and parametric test in nano-scaled technologies: process-aware SRAM design and test	Next

Includes bibliographical references and index

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