Normal view MARC view ISBD view

Design of viterbi decoders with reduced power consumption by Bijoy Goswami

By:

Contributor(s):

Material type: Map

MapLanguage: English Publication details: 2009Description: viii,57p.;30cmSubject(s):

DDC classification:

Dissertation note: National Institute of Technology, Silchar Master of Technology July, 2009

Average rating: 0.0 (0 votes)

Holdings
Item type	Current library	Call number	Status	Date due	Barcode
Dissertation	National Institute of Technology, Silchar	621.38 GOS (Browse shelf(Opens below))	Available		D2

Previous				No cover image available	No cover image available			Next
Previous	621.38 GOE Gate tutor 2020: electronics and communication engineering by Ankit Goel and Alka Singh	621.38 GOE Gate tutor 2020: electronics and communication engineering by Ankit Goel and Alka Singh	621.38 GOH PC-host communications:strategies for implementation	621.38 GOS Design of viterbi decoders with reduced power consumption	621.38 GRA Industrial and commercial wiring	621.38 GRA Electronic principles:Physics,Models and circuits	621.38 GRA Electronic principles:Physics,Models and circuits	Next

National Institute of Technology, Silchar Master of Technology July, 2009

There are no comments on this title.

to post a comment.