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Dual metal dual dielectric SOI TFET with gate-source overlap and drain underlap:simulation and modelling by Prashant Singh

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TextLanguage: English Publication details: Silchar 2016Description: xvii, 51p. 30cmSubject(s):

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Dissertation note: Supervised by Dr. Brinda Bhowmick (Shome), MTech Dissertation, NIT Silchar 2016

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Item type	Current library	Collection	Call number	Status	Date due	Barcode
Dissertation	National Institute of Technology, Silchar Reference	Reference	629.8 SIN (Browse shelf(Opens below))	Available		D414

Previous	No cover image available	No cover image available	No cover image available	No cover image available	No cover image available	No cover image available
Previous	629 ENG Development of strains transfer functions and asphalt stiffness reduction models in asphalt pavements	629.04 VIC Utility of regional paratransit modes in the north eastern region of india	629.8 MOH Fractional order systems and effect of initialization	629.8 SIN Dual metal dual dielectric SOI TFET with gate-source overlap and drain underlap:simulation and modelling	690 NAN Comparative study on modelling of shear wall with layaerd shell element and wide column	690.1 PAU Performance of concentrically and eccentrically braced steel frame buildings

Supervised by Dr. Brinda Bhowmick (Shome), MTech Dissertation, NIT Silchar 2016

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