Normal view MARC view ISBD view

SDRAM controller core using Wishbone Technology by Kumar Sauravxv

By:

Contributor(s):

Material type: Map

MapLanguage: English Publication details: 2020 Silchar NIT Description: xv,36p;30cmSubject(s):

DDC classification:

Dissertation note: National Institute of Technology, Silchar Master of Technology 2020

Average rating: 0.0 (0 votes)

Holdings
Item type	Current library	Call number	Status	Date due	Barcode
Dissertation	National Institute of Technology, Silchar Central Library@NITS	621.39 SAU (Browse shelf(Opens below))	Available		D1389

Previous	No cover image available	No cover image available	No cover image available	No cover image available	No cover image available			Next
Previous	621.39 SAI Handwritten character recognition using Deep Convolutional neural networks: investigation and empirical analysis.	621.39 SAN Mixed RF and Hybrid FSO/RF Communcations for V2N System	621.39 SAN Optimal deployment of IRS in fresnel region for QoS-Aware Terahertz communications.	621.39 SAU SDRAM controller core using Wishbone Technology	621.39 SHR Improved Structure of Piezoelectric MEMS Vibration Energy Harvester; Design & Analysis	621.39 SHU CMOS pll synthesizers analysis and design	621.39 SHU CMOS pll synthesizers analysis and design	Next

National Institute of Technology, Silchar Master of Technology 2020

There are no comments on this title.

to post a comment.