Design & analysis of switched capacitor based five-level inverter with reduced switch count for grid-tied PV applications by Abhishek Esampalli

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Material type: MapMapLanguage: English Publication details: 2023 Silchar NITDescription: xiv, 39pSubject(s): DDC classification:
  • 621.3 ESA
Dissertation note: National Institute of Technology, Silchar Master of Technology 2023
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Item type Current library Call number Status Date due Barcode
Dissertation Dissertation National Institute of Technology, Silchar Central Library@NITS 621.3 ESA (Browse shelf(Opens below)) Available D1750

Guided by Singh, Jiwanjot

National Institute of Technology, Silchar Master of Technology 2023

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