TY  - MAP
AU  - Ranju, Gupta Shubham Monoj
AU  - P Puspa Devi
TI  - Finding Clock Domain Crossing (CDS) issues through system on chip (SoC) Validation
U1  - 621 
PY  - 2020///
CY  - Silchar
PB  - NIT 
KW  - Electronic & Telecommunication Engineering
KW  - Microelectronic & VLSI Design
N1  - National Institute of Technology, Silchar
ER  -