Results of search for 'su:"VLSI design"'

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	1.	Low-voltage, low-power VLSI subsystems by Kiat-Seng Yeo and Kaushik Roy by Yeo, Kiat-Seng Roy, Kaushik Material type: Text Language: English Publication details: New York McGraw-Hill 2005 Availability: Items available for loan: National Institute of Technology, Silchar (1)Call number: 621.395 YEO. Place hold Add to cart (remove)
	2.	Digital VLSI systems design : a design manual for implementation of projects on FPGAs and ASICs using verilog by Seetharaman Ramachandran by Ramachandran, Seetharaman Material type: Text Language: English Publication details: Netherlands Springer 2007 Availability: Items available for loan: National Institute of Technology, Silchar (1)Call number: 621.395 RAM. Place hold Add to cart (remove)
	3.	Algorithms for VLSI design automation Sabih H. Gerez by Gerez, Sabih H Material type: Text Language: English Publication details: New Delhi Wiley India Pvt Ltd. 2011 2014 Availability: Items available for loan: National Institute of Technology, Silchar (11)Call number: 621.395GER , ... Place hold Add to cart (remove)
	4.	VLSI design for video coding : H.264/AVC encoding from standard specification to chip by Youn - Long Steve Lin, Chao - Yang Kao, Hung - Chih Kuo by Lin, Youn - Long Steve Kao, Chao - Yang Material type: Text Language: English Publication details: London Springer 2010 Availability: Items available for loan: National Institute of Technology, Silchar (1)Call number: 621.395 LIN. Place hold Add to cart (remove)
	5.	VLSI design for video coding : H.264/AVC encoding from standard specification to chip by Youn - Long Steve Lin, Chao - Yang Kao, Hung - Chih Kuo by Lin, Youn - Long Steve Kao, Chao - Yang Material type: Text Language: English Publication details: London Springer 2010 Availability: Items available for loan: National Institute of Technology, Silchar (3)Call number: 621.395 LIN, ... Place hold Add to cart (remove)
	6.	Digital VLSI systems design : a design manual for implementation of projects on FPGAs and ASICs using verilog by Seetharaman Ramachandran by Ramachandran, Seetharaman Material type: Text Language: English Publication details: New Delhi Springer 2007 Availability: Items available for loan: National Institute of Technology, Silchar (2)Call number: 621.392 RAM, ... Place hold Add to cart (remove)
	7.	No cover image available Subthreshold modeling of the edge & fringing effects on MOS transistor by Kalyan Koley by Koley, Kalyan Baishya, S Material type: Map Language: English Publication details: 2009 Dissertation note: National Institute of Technology, Silchar Master of Technology July, 2009 Availability: Items available for loan: National Institute of Technology, Silchar (1)Call number: 621.38 KOL. Place hold Add to cart (remove)
	8.	No cover image available Design of viterbi decoders with reduced power consumption by Bijoy Goswami by Goswami, Bijoy Gupta, S. K Material type: Map Language: English Publication details: 2009 Dissertation note: National Institute of Technology, Silchar Master of Technology July, 2009 Availability: Items available for loan: National Institute of Technology, Silchar (1)Call number: 621.38 GOS. Place hold Add to cart (remove)
	9.	No cover image available Synthesis and optimization of a 4-bit magnitude comparator circuit and application of pre-computation logic for low power design by Sanjeet Kumar Sinha by Sinha, Sanjeet Kumar Chaudhury, Saurabh Material type: Map Language: English Publication details: 2009 Dissertation note: National Institute of Technology, Silchar Master of Technology May, 2009 Availability: Items available for loan: National Institute of Technology, Silchar (1)Call number: 621.38 SIN. Place hold Add to cart (remove)
	10.	No cover image available Simulation and analysis of lightly-doped ultra-thin Triple Metal Double Gate (TM-DG) MOSFETs with High-K dielectric for diminished short channel effects by Achinta Baidya by Baidya, Achinta Gupta, Santosh Kumar Material type: Map Language: English Publication details: 2011 Dissertation note: National Institute of Technology, Silchar Master of Technology June, 2011 Availability: Items available for loan: National Institute of Technology, Silchar (1)Call number: 621.38 BAI. Place hold Add to cart (remove)
	11.	No cover image available Finding Clock Domain Crossing (CDS) issues through system on chip (SoC) Validation. by Gupta Shubham Monoj Ranju by Ranju, Gupta Shubham Monoj P Puspa Devi Material type: Map Language: English Publication details: Silchar NIT 2020 Dissertation note: National Institute of Technology, Silchar Master of Technology 2020 Availability: Items available for loan: National Institute of Technology, Silchar (1)Call number: 621 RAN. Place hold Add to cart (remove)
	12.	No cover image available Design, Modelling and Development of surface acoustic wave (SAW) Bandpass filter with center frequency at 21.4 MHz by Nirupam Sharma by Sharma, Nirupam Baishya, Srimanta Material type: Map Language: English Publication details: Silchar NIT 2020 Dissertation note: National Institute of Technology, Silchar Master of Technology 2020 Availability: Items available for loan: National Institute of Technology, Silchar (1)Call number: 624 ESS. Place hold Add to cart (remove)
	13.	No cover image available A 30nm 11T SRAM for Ultralow-Voltage Operations. by Manasi Madhav Mundhe by Mundhe, Manasi Madhav K.L. Baishnab Material type: Map Language: English Publication details: Silchar NIT 2020 Dissertation note: National Institute of Technology, Silchar Master of Technology 2020 Availability: Items available for loan: National Institute of Technology, Silchar (1)Call number: 621 MUN . Place hold Add to cart (remove)
	14.	No cover image available A 30nm 11T SRAM for Ultralow-Voltage Operations. by Abdulquyyaum, Khan Abdulkaeem by Abdulquyyaum, Khan Abdulkaeem Supriya Bhattacharjee Material type: Map Language: English Publication details: Silchar NIT 2020 Dissertation note: National Institute of Technology, Silchar Master of Technology 2020 Availability: Items available for loan: National Institute of Technology, Silchar (1)Call number: 621 ABD. Place hold Add to cart (remove)
	15.	No cover image available Routing Optimization of VLSI Layout for Delay Reduction by Mani Sankara Reddy by Reddy, Mani Sankara Baishya, Srimanta Material type: Map Language: English Publication details: Silchar NIT 2020 Dissertation note: National Institute of Technology, Silchar Master of Technology 2020 Availability: Items available for loan: National Institute of Technology, Silchar (1)Call number: 621.39 RED. Place hold Add to cart (remove)
	16.	No cover image available Hardware implementation of a Support Vector Machine (SVM) Classifier by Rajarshi Das by Das, Rajarshi Paul, Prashanta Kumar Material type: Map Language: English Publication details: Silchar NIT 2020 Dissertation note: National Institute of Technology, Silchar Master of Technology 2020 Availability: Items available for loan: National Institute of Technology, Silchar (1)Call number: 621.39 DAS. Place hold Add to cart (remove)
	17.	No cover image available SDRAM controller core using Wishbone Technology by Kumar Sauravxv by Saurav, Kumar Chakraborty, Ujjal Material type: Map Language: English Publication details: Silchar NIT 2020 Dissertation note: National Institute of Technology, Silchar Master of Technology 2020 Availability: Items available for loan: National Institute of Technology, Silchar (1)Call number: 621.39 SAU. Place hold Add to cart (remove)
	18.	No cover image available Validating Partial Reconfiguration fot Intel FPGA by Prasanth Kumar by Kumar, Prasanth Tripathi, S.K Material type: Map Language: English Publication details: Silchar NIT 2020 Dissertation note: National Institute of Technology, Silchar Master of Technology 2020 Availability: Items available for loan: National Institute of Technology, Silchar (1)Call number: 621.39 KUM. Place hold Add to cart (remove)
	19.	No cover image available Analog Validation, Characterization and Analysis of I/O Pad in Test Vehicle by Umakanta Padhan by Padhan, Umakanta Lenka, Trupti Ranjan Material type: Map Language: English Publication details: Silchar NIT 2020 Dissertation note: National Institute of Technology, Silchar Master of Technology 2020 Availability: Items available for loan: National Institute of Technology, Silchar (1)Call number: 621.39 PAD. Place hold Add to cart (remove)
	20.	No cover image available Customized Routing Algorithm for Timing Collateral Layout Tool by Sagarika Naik by Naik, Sagarika Kavicharan, M Material type: Map Language: English Publication details: Silchar NIT 2020 Dissertation note: National Institute of Technology, Silchar Master of Technology 2020 Availability: Items available for loan: National Institute of Technology, Silchar (1)Call number: 621.39 NAI. Place hold Add to cart (remove)

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