| 000 | 00701nem a2200205Ia 4500 | ||
|---|---|---|---|
| 005 | 20230512182915.0 | ||
| 008 | 160331s9999 xx 000 0 und d | ||
| 040 | _aCentral Library-NITS | ||
| 041 | _aEnglish | ||
| 082 |
_a621 _bRAN |
||
| 100 | _aRanju, Gupta Shubham Monoj | ||
| 245 |
_aFinding Clock Domain Crossing (CDS) issues through system on chip (SoC) Validation. _cby Gupta Shubham Monoj Ranju |
||
| 260 |
_c2020 _aSilchar _bNIT |
||
| 300 | _axiii,30p;30cm | ||
| 502 |
_aNational Institute of Technology, Silchar _bMaster of Technology _d2020 |
||
| 650 | _aElectronic & Telecommunication Engineering | ||
| 650 | _aMicroelectronic & VLSI Design | ||
| 700 | _aP Puspa Devi | ||
| 942 | _cDE | ||
| 999 |
_c25365 _d25365 |
||