000 00720nem a2200205Ia 4500
005 20231017150855.0
008 160331s9999 xx 000 0 und d
040 _aCentral Library-NITS
041 _aEnglish
082 _a621.382
_bNIR
100 _aNirmal Dev S. S.
245 _aOptimization & performance analysis of L-gate HZO ferroelectric FET for memory applications: a simulation study
_cby Nirmal Dev S. S.
260 _c2023
_aSilchar
_bNIT
300 _axxi, 38p.
500 _aGuided by Shivendra Kumar Pandey; Anup Kumar Sharma
502 _aNational Institute of Technology, Silchar
_bMaster of Technology
_d2023
650 _aElectronics and communication engineering
700 _a
942 _cDE
999 _c27123
_d27123