000 | 00687nam a2200217Ia 4500 | ||
---|---|---|---|
008 | 160330s9999||||xx |||||||||||||| ||und|| | ||
020 |
_a0-7803-1149-3 _cRs.795.00 |
||
040 | _aCentral Library-NITS | ||
041 | _aEnglish | ||
082 |
_a621.3815364 _bRAZ |
||
245 |
_aMonolithic phase-Locked loops and clock recovery circuits: theory and design _cedited by Behzad Razavi |
||
260 |
_aNew York _bIEEE _c1996 |
||
300 | _aix, 497p. :ill. | ||
500 | _aIncludes bibliogarphical references and index | ||
521 | _bBook Land | ||
650 | _aIntegrated circuits design | ||
650 | _aPhase-Locked loops-Design | ||
650 | _aTiming circuits-design | ||
700 | _aRazavi, Behzad, ed. | ||
942 | _cBK | ||
999 |
_c9740 _d9740 |