| 000 | 00619nam a2200217Ia 4500 | ||
|---|---|---|---|
| 008 | 160330s9999||||xx |||||||||||||| ||und|| | ||
| 020 |
_a0-7923-7766-4 _cRs.5698.60 |
||
| 040 | _aCentral Library-NITS | ||
| 041 | _aEnglish | ||
| 082 |
_a621.3815 _bBER |
||
| 100 | _aBergeron, Janick | ||
| 245 |
_aWriting testbenches: functional verification of HDL models _cby Janick Bergeron |
||
| 260 |
_aBoston _bKluwer Academic _c2000 |
||
| 300 | _axxii, 354p. :ill. | ||
| 500 | _aIncludes index. | ||
| 521 | _bAhyja Book | ||
| 650 | _aCircuits theory | ||
| 650 | _aComputer hardware | ||
| 650 | _aIntegrated circuits | ||
| 942 | _cBK | ||
| 999 |
_c9804 _d9804 |
||