Design through verilog HDL (Record no. 18475)

MARC details
000 -LEADER
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008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
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020 ## - ISBN
International Standard Book Number 9812-53-131-9
040 ## - CATALOGING SOURCE
Original cataloging agency Central Library-NITS
041 ## - Language
Language English
082 ## - DDC NUMBER
Classification number 621.392
Book Number PAD
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name Padmanabhan,T.R.
245 ## - TITLE STATEMENT
Title Design through verilog HDL
Statement of Resposibility by T.R.Padmanabhan and B.Bala Tripura Sundari
260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT)
Place of publication, distribution, etc Singapore
Name of publisher, distributor, etc John Wiley
Date of publication, distribution, etc 2004
300 ## - PHYSICAL DESCRIPTION
Pages xii, 455p. :ill.
500 ## - GENERAL NOTE
General note Includes bibliographical references and index.
650 ## - Subject
Subject Computer hardware description language
650 ## - Subject
Subject Switch level-Modeling
650 ## - Subject
Subject Verilog
700 ## - Added Entry Personal Name
Added Entry Personal Name Tripura Sundari, B.Bala
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type Books
521 ## -
-- Book Emporium
Holdings
Withdrawn status Lost status Damaged status Not for loan Location (home branch) Sublocation or collection (holding branch) Date acquired Koha issues (times borrowed) Koha full call number Barcode (Accession No.) Koha date last seen Price effective from Koha item type
        National Institute of Technology, Silchar National Institute of Technology, Silchar 03/30/2016   621.392 PAD 51531 03/30/2016 03/30/2016 Books
        National Institute of Technology, Silchar National Institute of Technology, Silchar 03/30/2016   621.392 PAD 51530 03/30/2016 03/30/2016 Books
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