Minimizing and exploiting leakage in VLSI design by Nikhil Jayakumar, Suganth Paul, Rajesh Garg, Kanupriya Gulati and Sunil P. Khatri
Material type: TextLanguage: English Publication details: New York Springer 2010Description: xxvii, 214p.:illISBN:- 9781441909497
- 621.395 / JAY
Item type | Current library | Call number | Status | Date due | Barcode |
---|---|---|---|---|---|
Books | National Institute of Technology, Silchar | 621.395 / JAY (Browse shelf(Opens below)) | Available | 89283 |
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621.395 HWA Digital logic and microprocessor design with VHDL | 621.395 HWA Digital logic and microprocessor design with VHDL | 621.395 HWA Digital logic and microprocessor design with VHDL | 621.395 / JAY Minimizing and exploiting leakage in VLSI design | 621.395 JON Symbolic simulation methods for industrial formal verification | 621.395 KAN CMOS digital integrated circuits: analysis and design | 621.395 KAN CMOS digital integrated circuits: analysis and design |
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